
Jawad Nasrullah
CEO, CTO, and chiplet integration expert
jawad-nasrullah
Palo Alto, California
Joined July 2025
Network
2.7K connectionsRDLBAN
JWBNDJ
MAPCEF
BNRCHK
SRPCEO
SGTS
ASMV
Network
2.7K connectionsSummary
Jawad Nasrullah is a distinguished leader in the field of heterogeneous integrated circuits and 3D-ICs, currently serving as the CEO of Palo Alto Electron Inc. His work involves cutting-edge research and development to advance these technologies, particularly for high-performance computing applications like AI. ieee+1
He is a recognized expert and advocate for chiplet technology, co-leading the Open Chiplet Economy initiative at the Open Compute Project Foundation and being a founding member of Chiplet.US. His previous company, zGlue, Inc., focused on developing a platform for chiplet integration and a marketplace for their distribution, highlighting his long-standing commitment to this area. ieee+2
With a strong academic background, including a Ph.D. in Electrical Engineering from Stanford University, Jawad has contributed significantly to semiconductor research. His doctoral and post-doctoral work at Stanford involved low-power device technologies and novel lithography techniques. He has received multiple scholarships and a medal from the President of Pakistan for his academic excellence. ieee+2
Jawad Nasrullah is a prolific inventor and author, holding numerous patents and publishing several scientific papers. His patented work covers diverse areas such as memory management, impedance matching, modular stacked integrated circuits, and energy efficiency in semiconductor designs. His research has been widely cited by other academics. justia+2
His career spans leadership and engineering roles at prominent technology companies including Intel, Samsung Electronics, Sun Microsystems, and Transmeta Corporation. This broad industry experience has provided him with expertise in areas like power management, hardware architecture, and analog-to-digital converters. ieee+1
Work
Education
Writing
Driving the AI Revolution with Chiplets: Got a Lot of Chip Designing on Tap
January 1, 2025A presentation or paper discussing chiplets for generative AI.
System and methods for producing modular stacked integrated circuits
January 1, 2017A patent focused on modular stacked integrated circuit production.
Method and apparatus for managing a spin transfer torque memory
January 1, 2016A patent concerning spin transfer torque memory management.
Raised source/drain with super steep retrograde channel
January 1, 2010A patent related to semiconductor device structures.
System and method for dynamic impedance matching
January 1, 2006A patent on systems and methods for dynamic impedance matching.
An atomic force microscope study of surface roughness of thin silicon films deposited on SiO/sub 2
January 1, 2005A published paper on atomic force microscopy and surface roughness of silicon films.
Similar profiles
MP
Mike Pinelis
28.8K connections
HDHenri Deshays
Investor at Newfund
20.2K connections
MCMark Chung
Member Board of Directors at The American Council for an Energy-Efficient Economy (ACEEE)
20.4K connections
HSHrishikesh Sathawane
GTM Advisor at DisruptiveSecularGrowth
26.3K connections
SFSuzanne Fletcher
6.9K connections
BŞahin Boydaş
Founder & CEO at Lovie.co
116.5K connections