
Surya Karthik Alluri
Design Verification Engineer — VLSI and SystemVerilog
Bengaluru, Karnataka, India
Joined April 2026
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Summary
Focused VLSI design verification practitioner with hands-on verification skills (SystemVerilog, Verilog, UVM) and emphasis on chip-level DV workflows. rocketreach+1
Career progression from campus internship to industry DV roles: completed an FPGA internship in 2019, a trainee stint in 2021, then DV engineer positions at SION Semiconductors and Tech Mahindra Cerium. cake+1
Public-facing technical communicator who publishes and curates VLSI content on YouTube to share knowledge beyond workplace projects. youtube
Educational foundation in Electronics and Telecommunication from G H Raisoni College (2016–2020), documented in institutional records. amazonaws+1
Work
Education
Projects
Hobbies
Creating and sharing technical VLSI-related videos on YouTube. youtube
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