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Kiran Awati

Kiran Awati

ASIC digital design engineer focused on VLSI

Bengaluru, India
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Joined March 2026
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Semiconductor Alumni
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Synopsys VLSI Engineers
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VIT Vellore VLSI
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VLSI Digital Verification
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VLSI Physical Design
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VLSI Analog Design
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Synopsys R&D Software

Summary

Specialized graduate training in VLSI โ€” completed an MTech in VLSI during 2022โ€“2024, indicating focused postgraduate study in chip design and related fields. rocketreach
Progression at Synopsys from intern to senior engineering role โ€” recorded as an ASIC Digital Design Intern (2023โ€“2024) and subsequently an ASIC Digital Design Sr Engineer (2024โ€“present) at Synopsys. rocketreach+1
Undergraduate technical foundation in electronics and telecommunications โ€” completed a B.Tech (E&TC) at MIT Academy of Engineering (2017โ€“2021), documented in institute materials. ac+1
Geographic and community ties in India โ€” professional profiles list Bengaluru as current location, and community listings associate the name with Pune, indicating connections to both cities. indiasudar

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