Rewati Raman Raut

Experienced ASIC physical-design leader: Rewati is a Manager - Physical Design with 19+ years of experience in ASIC physical implementation and CAD, having progressed through senior and principal engineering roles at Microchip (and SMSC prior to acquisition). He manages a team of 20+ engineers, providing technical direction, mentorship, and hiring support, and his work focuses on implementation flows, timing closure, and solving large-scale ASIC physical challenges; he routinely collaborates with multiple business units while leading project-management efforts for full-chip implementation. linkedin+1

Research & VLSI implementation background: Earlier in his career Rewati worked as a research assistant at IIT Bombay and coauthored papers on memory-efficient LDPC decoder designs, demonstrating a strong blend of academic research and practical ASIC implementation expertise. scitepress+2

Bengaluru-based semiconductor engineer with broad services and in-house experience: Public professional listings place Rewati in Bengaluru and show experience at service/engineering firms (Sasken, CITL) before a long tenure at Microchip, indicating strengths in delivery-oriented engineering and in-house ASIC design. linkedin+1