Keerthivasan S
ECE student and RTL design & verification intern
keerthivasan-1507
Chennai, India
Joined June 2026
Summary
Practical RTL design and verification experience through an industry-linked internship. ac+1
Undergraduate ECE student (Batch 2022–2026) at St. Joseph's College of Engineering. ac+1
Supplementary technical training in PLC and VLSI via Internshala Trainings.