Shreyas Deshmukh
Research Scholar focused on Analog Circuit and VLSI Design at IIT Bombay
Mumbai, Maharashtra, India
Summary
Shreyas Deshmukh is a dedicated Research Scholar at the Indian Institute of Technology, Bombay, specializing in Analog Circuit, Digital System Design, and Digital VLSI Design. His research focuses on advanced memory technologies and their applications in artificial neural networks, particularly for on-chip training and inference in edge devices, with a strong emphasis on energy efficiency and security. google+2
His work has led to multiple publications in prestigious venues such as IEEE and ACM, addressing challenges like excessive power consumption and vulnerability to tampering in in-memory computing (IMC) based neural network operations. He has contributed to innovations like one-time programmable memory (OTPM) for secured and ultra-low powered ANN accelerators. google+2
Prior to his research at IIT Bombay, Shreyas served as an Adjunct Faculty member at the College of Engineering, Pune (COEP) from 2017 to 2019, and pursued his M. Tech. at COEP from 2011 to 2013, following his B. E. in Electronics and Telecommunication from Nagpur University in 2010. He was also a Research Scholar in the SRC Research Scholars Program from 2021 to 2024.
Work
Education
Writing
Analog and Temporary On-chip Memory for ANN Training and Inference
January 1, 2025One-Time Programmable Memory for Ultra-Low Power ANN Inference Accelerator With Security Against Thermal Fault Injection
January 1, 2025Memory technologies for in-memory computing (IMC) based neural network (NN) operations in edge devices face two primary challenges. First, these technologies often exhibit an excessive average power due to the high currents in the memory’s low and high resistance state (LRS and HRS). Second, their vulnerability to tampering compromises device reliability in security-sensitive Internet of Things (IoT) applications. This paper proposes the use of one-time programmable memory (OTPM) for IMC-based thermal attack-secured and ultra-low powered NN accelerator with write disablement to prevent re-programming/tampering.